Type 3 \u2013 SD (Standard Density)<\/strong><\/td>Standard<\/td> 2.5D \/ 2D silicon photonics<\/td> Mainly internal<\/td> 28.17 \u00d7 43.07 mm, 0.6 \u00d7 0.6 mm pad pitch<\/td> Systems with sufficient board space and cost-sensitive deployment scenarios<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\nThe three product categories address different design priorities.<\/p>\n\n\n\n
XD focuses on maximizing optical density and minimizing footprint.
<\/span>Four Integration Methods<\/strong><\/strong><\/span><\/h2>\n\n\n\nThe UPO framework defines multiple approaches for integrating optical engines with computing and switching platforms, ranging from conventional board-level implementations to more advanced high-density packaging solutions.<\/p>\n\n\n\n
The four integration approaches include:<\/p>\n\n\n\n
<\/span>On-PCB<\/strong><\/strong><\/span><\/h3>\n\n\n\nThe optical engine is mounted on the PCB, representing the most conventional NPO implementation approach. This method provides relatively simple manufacturing and maintenance advantages while shortening the electrical connection compared with front-panel pluggable optics.<\/p>\n\n\n\n
<\/span>On-Substrate<\/strong><\/strong><\/span><\/h3>\n\n\n\nThe optical engine is integrated on the same substrate as the main ASIC package. This approach further reduces electrical channel length and improves signal integrity for higher-speed interconnects.<\/p>\n\n\n\n
<\/span>Over-Substrate<\/strong><\/strong><\/span><\/h3>\n\n\n\nA fan-out interconnect structure is mounted above the ASIC substrate, enabling higher interconnect density and shorter electrical paths for advanced system architectures.<\/p>\n\n\n\n
<\/span>On-CoWoP<\/strong><\/strong><\/span><\/h3>\n\n\n\nThe optical engine is integrated onto the main chip\u2019s CoWoP (Chip-on-Wafer-on-Package) substrate. This approach targets the highest-density applications where signal integrity, packaging efficiency, and bandwidth scalability are critical.<\/p>\n\n\n\n<\/span>Performance, Reliability and Serviceability<\/strong><\/strong><\/span><\/h2>\n\n\n\nAcross the UPO framework, the architecture targets 224G-class electrical lane signaling<\/strong>, supporting optical interconnect modules in the 6.4T to 7.2T class<\/strong> depending on implementation efficiency and system design.<\/p>\n\n\n\nThe roadmap also includes future scaling toward 448G-per-lane signaling<\/strong> and 12.8T-class optical modules<\/strong>.<\/p>\n\n\n\nFor reliability and maintenance, the design focuses on several key features:<\/p>\n\n\n\n
\nField-replaceable optical modules<\/li>\n\n\n\n Solderless socket-based connection<\/li>\n\n\n\n Alignment pins combined with clamped backplane structures<\/li>\n\n\n\n Pluggable FAU (D-FAU), allowing fiber assemblies to be handled separately from optical engines<\/li>\n<\/ul>\n\n\n\nThe UPO V1.0 framework was introduced in September 2026. Type 2-HD and Type 1-XD socket implementations, 6.4T-class UPO modules, and complete system demonstrations are expected to progress through sampling and validation phases during 2026, with 448G-per-lane and 12.8T-class solutions targeted in future roadmap development.<\/p>\n\n\n\n
<\/span>Why 224G Per Lane Is the Inflection Point<\/strong><\/strong><\/span><\/h2>\n\n\n\nMoving to 224G per lane represents a significant transition for AI data center interconnect architectures.<\/p>\n\n\n\n
At higher SerDes speeds, electrical channel challenges become increasingly difficult. Parameters such as insertion loss, return loss, and crosstalk degrade rapidly over longer traces, increasing the difficulty of maintaining sufficient link margin.<\/p>\n\n\n\n
These challenges make traditional long-reach electrical connections more dependent on advanced equalization and DSP-based retiming solutions, which can increase system power consumption and silicon complexity.<\/p>\n\n\n\n
This is why 224G-class signaling is considered a critical milestone for next-generation optical interconnect architectures. By placing optical engines closer to switching or computing ASICs, NPO reduces electrical channel length and improves the feasibility of lower-power direct-drive architectures.<\/p>\n\n\n\n
<\/span>NPO vs Pluggable Optics Comparison<\/strong><\/strong><\/span><\/h2>\n\n\n\nParameter<\/strong><\/strong><\/td>Pluggable Optics (OSFP, 224G-class)<\/strong><\/strong><\/td>NPO 6.4T-Class (32 \u00d7 224G-class lanes)<\/strong><\/strong><\/td><\/tr>Bandwidth per module<\/td> Approximately 1.6T (8 \u00d7 224G-class lanes)<\/td> Approximately 6.4T-class<\/td><\/tr> Bandwidth density<\/td> 1\u00d7<\/td> Approximately 4\u00d7<\/td><\/tr> Power per bit<\/td> ~15 pJ\/bit (representative industry estimate for 1.6T at ~24W)<\/td> ~6 pJ\/bit (example implementation including 26W optical module + 13W external laser source)<\/td><\/tr> Electrical channel<\/td> Front-panel connector + module PCB + longer motherboard traces<\/td> Shorter PCB routing between ASIC and optical engine<\/td><\/tr> Drive architecture<\/td> Linear drive becomes increasingly challenging at higher speeds<\/td> Shorter channels improve feasibility of linear-drive architectures<\/td><\/tr> Upgrade approach<\/td> Module-level replacement<\/td> Optical engine\/module-level replacement with future 448G roadmap<\/td><\/tr> Maintenance model<\/td> Field-pluggable module<\/td> Field-replaceable optical engine and pluggable FAU<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\nThe key advantages are higher bandwidth density and improved energy efficiency. Based on representative system assumptions, NPO architectures can achieve significantly lower energy per bit compared with traditional pluggable implementations.<\/p>\n\n\n\n
However, the primary architectural improvement is not only power reduction. The more important change is the shortened electrical path between the switch ASIC or accelerator and the optical engine, which improves signal integrity and enables higher-speed scaling.<\/p>\n\n\n\n<\/span>Inside the First Generation of NPO Hardware<\/strong><\/strong><\/span><\/h2>\n\n\n\n<\/span>102.4T NPO Network Switch (TCS9610-128O0)<\/strong><\/strong><\/span><\/h3>\n\n\n\nThe reference switch demonstrated at ODCC integrates 102.4 Tbps switching capacity<\/strong> in a 4RU chassis and exposes the capacity through 128 \u00d7 800G optical interfaces<\/strong>.<\/p>\n\n\n\nKey features include:<\/p>\n\n\n\n
\nBroadcom Tomahawk 6 switch ASIC with 102.4 Tbps switching capacity<\/li>\n\n\n\n 4RU chassis supporting 128 \u00d7 800G MPO16 optical interfaces<\/li>\n\n\n\n Optical engines positioned close to the switch ASIC, reducing die-to-die channel loss to below 16 dB<\/li>\n\n\n\n VPD (Vertical Power Delivery) architecture for improved power distribution efficiency<\/li>\n\n\n\n Optical conversion module power reduction compared with conventional architectures<\/li>\n\n\n\n Compatibility with 3.2T-class NPO optical modules<\/li>\n\n\n\n Support for multiple ELSFP remote laser sources with field replacement capability<\/li>\n\n\n\n 2+2 redundant power supplies and 7+1 redundant fans, with liquid cooling reserved for future versions<\/li>\n<\/ul>\n\n\n\n<\/span>ETH-X Ultra All-Optical Compute Node<\/strong><\/strong><\/span><\/h3>\n\n\n\nThe compute-node reference design applies the same optical integration concept closer to GPU systems.<\/p>\n\n\n\n
Key specifications include:<\/p>\n\n\n\n
\n87.8 mm (H) \u00d7 537 mm (W) \u00d7 964 mm (D), approximately 30 kg<\/li>\n\n\n\n New GPU module specification designed for domestic accelerator platforms, exceeding OCP OAM 2.0 requirements in PCB area, bandwidth capability, and power delivery capability<\/li>\n\n\n\n Standard GPU module size of 115 mm \u00d7 253 mm supporting approximately 2,500 W per module<\/li>\n\n\n\n Three 3.2T \/ 6.4T-class NPO optical modules per GPU module, supporting both NPO and NPC architectures<\/li>\n\n\n\n Approximately 2U optical compute node architecture with 4 GPUs and 1\u20132 CPUs using hybrid air-liquid cooling<\/li>\n<\/ul>\n\n\n\n<\/span>Three Engineering Challenges the Industry Had to Solve<\/strong><\/strong><\/span><\/h2>\n\n\n\nThe development of NPO systems requires solving several practical engineering challenges.<\/p>\n\n\n\n
<\/span>1. Module Mounting and Contact Reliability<\/strong><\/strong><\/span><\/h3>\n\n\n\nLGA-based optical sockets require precise mechanical control.<\/p>\n\n\n\n
With multiple optical modules installed in dense configurations, accumulated manufacturing tolerances can affect contact reliability.<\/p>\n\n\n\n
Solutions include:<\/p>\n\n\n\n
![\"near-package](\"https:\/\/www.fibermall.com\/blog\/wp-content\/uploads\/2026\/09\/near-package-optics-NPO.png\")
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