October 14, 2026 — NVIDIA and Cisco have announced Ultra-Dense Small Form Factor Pluggable (USFP), a new optical transceiver form factor designed as the first pluggable module to carry 400Gb/s-per-lane electrical signals. Compared with today’s 200Gb/s-per-lane pluggables, USFP delivers 4x the bandwidth and front-panel bandwidth density at roughly 1.3x the power efficiency, letting AI factory operators scale compute inside the same network footprint while shrinking networking’s share of the total power budget.
USFP (Ultra-Dense Small Form Factor Pluggable) is a new optical module form factor from NVIDIA and Cisco. It packs 16 full-duplex lanes at 400Gb/s each into an OSFP-sized package — 6.4Tb/s today, scaling to 32 lanes and 12.8Tb/s. It targets Ethernet AI fabrics, supports both switches and SuperNICs, dissipates up to 100W without an embedded cooling circuit, and is being developed toward an open multi-source specification.
Why front-panel density is now the bottleneck in AI fabrics
AI models keep growing and inference demand keeps expanding, which means AI factories must connect far more compute — while managing network complexity, power draw and cost. Moving more data per watt and per switch is how operators improve the return on their infrastructure investment.
Scaling an AI fabric requires two things at once: more bandwidth per connection, and more connections per switch. The constraint is physical. When a switch runs out of ports, the next option is adding another switch tier plus more optical links — which increases latency, power consumption and cost.
USFP is designed to move AI builders from 200Gb/s-per-lane to 400Gb/s-per-lane Ethernet fabrics without adding network tiers, while preserving the pluggable operating model that has already been proven across multiple generations of data center networks. The goal: adopt next-generation optics without ripping out existing infrastructure.
USFP specifications at a glance
| Specification | USFP | 200G/lane pluggable (baseline) |
| Electrical lane rate | 400Gb/s | 200Gb/s |
| Lane count (initial configuration) | 16 full-duplex | 8 |
| Total capacity | 6.4Tb/s (x16) → 12.8Tb/s (x32) | — |
| Package size | OSFP-sized footprint | OSFP |
| Bandwidth / front-panel density | 4x | 1x (baseline) |
| Power efficiency (per bit) | ~1.3x better | Baseline |
| Max module power dissipation | Up to 100W, no embedded cooling circuit | — |
| Target endpoints | 1.6Tb/s | — |
| Host devices | Switches and SuperNICs | Switches, NICs |
16 lanes today, 32 tomorrow: doubling lane count and lane rate
The first planned USFP-based transceivers will integrate 16 full-duplex lanes inside an OSFP-sized package, supporting both switches and SuperNICs, with a roadmap to 32 lanes and beyond.
By doubling lane count and doubling bandwidth per lane simultaneously, USFP lets AI fabrics connect more 1.6Tb/s endpoints without adding a switch tier. End-to-end, customers will be able to reach 12.8Tb/s of aggregate capacity per module.
Measured against a comparable OSFP-sized module, USFP offers 4x the bandwidth and front-panel density and about 1.3x the power efficiency versus 200Gb/s-per-lane pluggables. In practical terms: more compute scale in the same rack-unit footprint, and a lower share of the AI factory’s power budget spent moving bits.
New 2D contact array connector built for 400Gb/s signaling
Because 400Gb/s-per-lane signaling is unforgiving mechanically as well as electrically, USFP introduces a new two-dimensional contact array connector with a two-step insertion sequence: high-speed contacts engage only after the module is fully seated.
That sequence delivers three benefits:
- Less contact wear — high-speed contacts are not dragged during insertion.
- Better signal integrity at 400Gb/s-per-lane.
- More predictable insertion force for operators doing large-scale field replacements.
The connector also provides headroom for the roadmap to 32 full-duplex lanes or more. And because it is engineered for 400Gb/s performance, NVIDIA and Cisco say it delivers improved performance even at 200Gb/s-per-lane today.
Up to 100W without embedded cooling
USFP supports up to 100W of module power dissipation without requiring a separate dedicated embedded cooling circuit inside the transceiver. Removing that in-module cooling simplifies switch design and improves reliability, while keeping the modules field-replaceable.
Every USFP configuration is specified to support optical designs that simplify signal processing to cut latency and power, covering a range of optical technologies and reach classes — giving system designers flexibility across different AI fabric deployment scenarios.
Ecosystem: TE Connectivity, Amphenol and a planned open specification
NVIDIA and Cisco are working with TE Connectivity and Amphenol on USFP cages, connectors and modules, with additional partners expected to join. The intent is to publish USFP through a community-led multi-source agreement, turning it into an open industry specification rather than a proprietary form factor.
That matters because AI infrastructure buyers typically refuse single-source optics. A shared form factor gives suppliers a common foundation for high-density pluggable infrastructure at 400Gb/s-per-lane — and reduces deployment risk for operators.
The collaboration also builds on existing interoperability work ensuring NVIDIA Spectrum-X Ethernet networks and Cisco Silicon One-based Ethernet networks operate seamlessly together, simplifying AI infrastructure deployment for enterprises, neoclouds and sovereign clouds.
How USFP compares with OSFP-XD, XPO and co-packaged optics
USFP enters a crowded field of next-generation form factors, including the Arista-led XPO MSA, OSFP-XD, socketed optics under Open CPX, and co-packaged optics (CPO). The differentiator is that USFP keeps the pluggable, field-replaceable operating model at the next SerDes generation — offering a hedge for operators who want 400G-per-lane density but are not ready to give up serviceability.
| Form factor | Serviceability | Lane rate | Approach |
| USFP | Field-replaceable pluggable | 400Gb/s | Higher lane count + lane rate in OSFP-sized package |
| OSFP-XD | Field-replaceable pluggable | 200Gb/s | Increased lane count |
| XPO (Arista-led MSA) | Field-replaceable pluggable | 200Gb/s | Higher front-panel density |
| Co-packaged optics (CPO) | Non-pluggable, integrated with switch ASIC | 200G/400G | Optics on-package with switch silicon |
What it means for optical transceiver buyers
For operators building AI fabrics, three practical takeaways:
- Front-panel density is the new battleground. Bandwidth per rack unit is becoming a bigger constraint than raw port speed, and module footprint now directly affects how many network tiers a fabric needs.
- Serviceability still wins for many deployments. Pluggable optics remain easier to stock, replace and multi-source than integrated alternatives — particularly for operators running heterogeneous networks.
- Supply ecosystem maturity will determine timing. Until switch silicon at 400G-per-lane ships at volume and the USFP MSA is ratified, availability timelines will matter more than published specs.
Frequently asked questions
What does USFP stand for?
USFP stands for Ultra-Dense Small Form Factor Pluggable, a new optical transceiver form factor announced by NVIDIA and Cisco in October 2026 for high-density AI factory networks.
How much capacity does a USFP module support?
The initial configuration carries 16 full-duplex lanes at 400Gb/s each (6.4Tb/s per module). A 32-lane configuration doubles this to 12.8Tb/s of total capacity.
How does USFP compare with existing OSFP modules?
In an OSFP-sized footprint, USFP delivers 4x the bandwidth and front-panel bandwidth density and roughly 1.3x the power efficiency versus 200Gb/s-per-lane pluggable modules.
Who supplies USFP connectors and cages?
TE Connectivity and Amphenol are the initial hardware partners building USFP cages, connectors and modules, with more partners expected. NVIDIA and Cisco plan to publish USFP as an open specification through a community-led multi-source agreement.
Where will USFP be used?
USFP targets Ethernet AI fabrics, in both switches and NVIDIA SuperNICs, supporting 1.6Tb/s endpoints with 400Gb/s-per-lane signaling.